DocumentCode :
1172317
Title :
Mechanical FEM Simulation of bonding process on Cu lowK wafers
Author :
Degryse, Dominiek ; Vandevelde, Bart ; Beyne, Eric
Author_Institution :
Interuniv. Microelectron. Centre, Leuven, Belgium
Volume :
27
Issue :
4
fYear :
2004
Firstpage :
643
Lastpage :
650
Abstract :
Major changes are currently happening at the back-end-of-line of integrated circuit processing. New materials are introduced to achieve better electrical performance. The drawback of these new materials is their different mechanical behavior compared to the traditionally used materials. LowK materials, used to replace silicon oxide as dielectric, are very soft and thus provide a low mechanical stiffness. The transition from gold wire to copper wire for the bonding process requires higher forces during the bonding process to form a bond due to the higher hardness of the copper. This leads to higher stresses in the structure. Finally, copper replaces aluminum as interconnection metal. In this study, the induced stresses during the wire bonding process are studied. In the first part, a contact analysis is performed to model the bond formation. The diameter of the bond is recorded as a function of the applied force. The yield stress of the bond material can be estimated by comparing these simulation results to experimental data. In the second part, the stresses in the bond pad are studied. The influence of different lowK materials and interconnection materials is investigated for different configurations of the bond pad. The comparison with the traditionally used materials is made.
Keywords :
finite element analysis; integrated circuit interconnections; wafer bonding; yield stress; Al; Cu; bond formation; bond pad; integrated circuit processing; interconnection materials; interconnection metal; lowK materials; lowK wafers; mechanical FEM simulation; wafer bonding; wire bonding; yield stress; Bonding forces; Bonding processes; Circuit simulation; Copper; Dielectric materials; Gold; Integrated circuit interconnections; Silicon; Stress; Wire; 65; IC; Integrated circuit; lowK materials; processing;
fLanguage :
English
Journal_Title :
Components and Packaging Technologies, IEEE Transactions on
Publisher :
ieee
ISSN :
1521-3331
Type :
jour
DOI :
10.1109/TCAPT.2004.838862
Filename :
1362797
Link To Document :
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