Embedded real-time HD video deblurring

This paper explores a computational deblurring algorithm that will ultimately be implemented in an embedded system with a targeted form factor of 2"×2"×3". The deblurring algorithm completes a Fourier filtering step followed by a wavelet transform denoising step on a 1080×1920 Bayer input 30 frame per second video feed. A major challenge in performing this processing in real time is that the wavelet denoising process utilizes the stationary wavelet transform, thus exploding the bandwidth requirements of the algorithm. To reach the desired form-factor and performance rate, a hardware accelerator is required. While both GPU and FPGA implementations have been pursued, this paper limits itself to describing our successful implementation using a desktop GPU card. Additionally, we briefly highlight methods, left for future work, for improving GPU performance based on our FPGA implementation efforts that should aid in scaling from our current desktop implementation to an embedded implementation.