Title :
High-transconductance p-channel AlGaAs/GaAs HFETs with low-energy beryllium and fluorine co-implantation self-alignment
Author :
Kiehl, Richard A. ; Hallali, P.E. ; Yates, J. ; Tischler, Mike A. ; Potemski, R.M. ; Cardone, F.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
The fabrication and electrical characteristics of p-channel AlGaAs/GaAs heterostructure FETs with self-aligned p/sup +/ source-drain regions formed by low-energy co-implantation of Be and F are reported. The devices utilize a sidewall-assisted refractory gate process and are fabricated on an undoped AlGaAs/GaAs heterostructure grown by MOVPE. Compared with Be implantation alone, the co-implantation of F/sup +/ at 8 keV with 2*10/sup 14/ ions/cm/sup 2/ results in a 3* increase in the post-anneal Be concentration near the surface for a Be/sup +/ implantation at 15 keV with 4*10/sup 14/ ions/cm/sup 2/. Co-implantation permits a low source resistance to be obtained with shallow p/sup +/ source-drain regions. Although short-channel effects must be further reduced at small gate lengths, the electrical characteristics are otherwise excellent and show a 77-K transconductance as high as 207 mS/mm for a 0.5- mu m gate length.<>
Keywords :
III-V semiconductors; aluminium compounds; beryllium; field effect transistors; fluorine; gallium arsenide; ion implantation; vapour phase epitaxial growth; 0.5 micron; 15 keV; 77 K; 8 keV; GaAs:Be,F-AlGaAs; MOVPE; electrical characteristics; fabrication; high transconductance; low source resistance; low-energy co-implantation; p-channel HFET; self-aligned source drain regions; self-alignment; semiconductors; shallow source/drain regions; sidewall-assisted refractory gate process; Electric resistance; Electric variables; Epitaxial growth; Epitaxial layers; Fabrication; Gallium arsenide; HEMTs; MODFETs; Surface resistance; Transconductance;
Journal_Title :
Electron Device Letters, IEEE
