Title :
High level programming of FPGAs for HPC and data centric applications
Author :
Segal, Oren ; Nasiri, Nasibeh ; Margala, Martin ; Vanderbauwhede, Wim
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Massachusetts Lowell, Lowell, MA, USA
Abstract :
Heterogeneous computing offers a promising solution for high performance and energy efficient computing. Until recently the high performance heterogeneous computing arena was dominated by discrete GPUs but in recent years, new solutions based on devices such as APUs and FPGAs have emerged. These new solutions show promise for further improvements in energy efficiency. FPGA based heterogeneous computing is an especially promising direction since it allows for the creation of custom hardware solutions for data centric parallel applications. One of the main issues delaying wide spread adoption of FPGAs as main stream high performance computing devices is the difficulty in programming them. Altera´s OpenCL implementation for FPGAs provides a high level of abstraction and increased ease of programmability of FPGAs. Two high performance computing applications (Lava Molecular Dynamics and Nearest-Neighbours) and a data centric application (Document Classification) were compiled using Altera´s OpenCL compiler and programmed on a Nallatech FPGA board. Hardware utilization, kernel execution time and total execution time are reported. Up to 5.3x, 4.3x and 1.3x speed up over the Dual Xeon processor implementations was achieved respectively for LavaMD, Nearest-Neighbours and Document Classification.
Keywords :
field programmable gate arrays; graphics processing units; parallel processing; power aware computing; program compilers; APU; Altera OpenCL compiler; FPGA based heterogeneous computing; FPGA programmability; HPC; LavaMD; Nallatech FPGA board; custom hardware solutions; data centric parallel applications; discrete GPU; document classification; dual Xeon processor implementations; energy efficient computing; hardware utilization; heterogeneous computing; high level programming; high performance computing applications; kernel execution time; nearest-neighbours; Field programmable gate arrays; Hardware; Heuristic algorithms; High performance computing; Kernel; Programming; Random access memory; FPGA; OpenCL; heterogeneous computing; high performance computing (HPC);
Conference_Titel :
High Performance Extreme Computing Conference (HPEC), 2014 IEEE
Conference_Location :
Waltham, MA
Print_ISBN :
978-1-4799-6232-7
DOI :
10.1109/HPEC.2014.7040979