Title :
Design of 3D FFTs with FPGA clusters
Author :
Jiayi Sheng ; Humphries, Ben ; Hansen Zhang ; Herbordt, Martin C.
Author_Institution :
Dept. of Electr. & Comput. Eng., Boston Univ., Boston, MA, USA
Abstract :
The three dimensional Fast Fourier Transform (3D FFT) is widely applied in various scientific applications. Distributed 3D FFTs require global communication: this becomes a serious concern when strong scaling is required as in long timescale molecular dynamics simulations. In this paper, we propose a parameterized 3D FFT design that targets at a 3D-torus FPGA-based network of various sizes. Characteristics include direct FPGA-FPGA communication links, support for various internal switch designs, and use of table-based routing which saves chip area and routing cycles. We find that even assuming extremely conservative parameters, we are able to run the 163 FFT in 3.9μs, 323 FFT in 5.46μs, 643 FFT in 9.52μs, and 1283 FFT in 25.72μs. These results indicate that clusters based on commodity FPGAs are likely to be appropriate when strong scaling is needed in applications limited by the 3D FFT.
Keywords :
fast Fourier transforms; field programmable gate arrays; logic design; 3D-torus FPGA-based network; FPGA cluster; chip area; direct FPGA-FPGA communication link; distributed 3D FFT; fast Fourier transform; internal switch design; routing cycle; table-based routing; three dimensional FFT; Field programmable gate arrays; IP networks; Indexes; Ports (Computers); Routing; Switches; Three-dimensional displays; 3D FFT; FPGA; High Performance Computing; Low-Latency Communication;
Conference_Titel :
High Performance Extreme Computing Conference (HPEC), 2014 IEEE
Conference_Location :
Waltham, MA
Print_ISBN :
978-1-4799-6232-7
DOI :
10.1109/HPEC.2014.7040997