DocumentCode
1173233
Title
A front-end for a digital satellite TV broadcasting receiver
Author
Noda, Masaki ; Yamamoto, Akio ; Iso, Yoshimi ; Tanaka, Hiromiki ; Adachi, Satoshi
Author_Institution
Image & Media Syst. Lab., Hitachi Ltd., Yokohama, Japan
Volume
40
Issue
3
fYear
1994
fDate
8/1/1994 12:00:00 AM
Firstpage
624
Lastpage
631
Abstract
A new front-end for a digital satellite TV broadcasting receiver has been developed, which consists of a tuner and a new QPSK demodulator IC. The QPSK demodulator IC includes a carrier and a clock recovery circuits. This IC can demodulate signals up to 40 Mbps at 140 MHz
Keywords
demodulators; digital communication systems; digital signal processing chips; direct broadcasting by satellite; phase shift keying; television broadcasting; television receivers; tuning; 140 MHz; 40 Mbit/s; QPSK demodulator IC; VHF; carrier circuits; clock recovery circuit; digital satellite TV broadcasting receiver; front-end; tuner; Bit rate; Clocks; Decoding; Demodulation; Error correction; Quadrature phase shift keying; Satellite broadcasting; TV broadcasting; TV receivers; Tuners;
fLanguage
English
Journal_Title
Consumer Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0098-3063
Type
jour
DOI
10.1109/30.320850
Filename
320850
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