DocumentCode
1173243
Title
The effect of biased spacers on LDD MOSFET behavior
Author
Parrillo, Louis C. ; Pfiester, James R. ; Woo, Michael P. ; Roman, Bernard ; Ray, Wayne ; Ko, Judy ; Gunderson, Craig
Author_Institution
Motorola Inc., Austin, TX, USA
Volume
12
Issue
10
fYear
1991
Firstpage
542
Lastpage
545
Abstract
The concept of using LDD spacers that are independently biased with respect to the gate electrode is presented. It is shown that the lateral electric field is strongly influenced by the drain polysilicon spacer potential. Depending on the N/sup -/ dose, the peak substrate currents can be either enhanced or reduced by shorting the drain polysilicon spacer to the drain potential. Short-channel LDD MOSFETs have been fabricated with polysilicon LDD spacers shorted to the source and drain electrodes by titanium silicide.<>
Keywords
insulated gate field effect transistors; reliability; LDD MOSFET behavior; biased spacers effect; drain polysilicon spacer potential; lateral electric field; peak substrate currents; short channel LDD MOSFETs; spacers shorted to drain; spacers shorted to source; Electric resistance; Electrodes; Etching; Fabrication; Hot carriers; MOSFET circuits; Maintenance; Silicides; Surface resistance; Titanium;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/55.119183
Filename
119183
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