Development of low operating voltage 2.5th generation MUSE (HDTV) chip set

Author

Ohtsubo, Kouta ; Takahashi, Hidenaga ; Ogawa, Kiyotaka ; Kohiyama, Kiyoshi ; Aoki, Tetsuo

Author_Institution

P Project Group Syst. LSI Labs., Fujitsu Labs. Ltd., Tokyo, Japan

Volume

40

Issue

3

fYear

1994

fDate

8/1/1994 12:00:00 AM

Firstpage

699

Lastpage

702

Abstract

In 1992 we developed a 2nd generation MUSE chip set containing more than 4.2 million transistors (five video chips and one audio chip). The chip set reduced the number of components to about 115, and power to about 113 compared with older first-generation chip sets. As a result, the cost of the HDTV (MUSE) receiver was cut by about 50%. But demand for even less expensive HDTV (MUSE) receivers is strong. We describe the development of a 2.5th generation MUSE chip set which through reduction of the operating voltages we succeeded in a 50% reduction in power consumption, and a 40% reduction in cost while maintaining compatibility with previous 2nd generation LSIs

Keywords

colour television receivers; high definition television; large scale integration; HDTV MUSE receiver; LSI; MUSE HDTV chip set; audio chip; low operating voltage; power consumption; video chips; Capacitance; Circuits; Costs; Energy consumption; HDTV; Laboratories; Large scale integration; Low voltage; Plastic packaging; Power generation;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/30.320860

Filename

320860