DocumentCode :
1173639
Title :
Guest Editors´ Introduction: The Network-on-Chip Paradigm in Practice and Research
Author :
Ivanov, André ; De Micheli, Giovanni
Author_Institution :
University of British Columbia
Volume :
22
Issue :
5
fYear :
2005
Firstpage :
399
Lastpage :
403
Abstract :
The network-on-chip paradigm is an emerging paradigm that effectively addresses and presumably can overcome the many on-chip interconnection and communication challenges that already exist in today´s chips or will likely occur in future chips. Effective on-chip implementation of network-based interconnect paradigms requires developing and deploying a whole new set of infrastructure IPs and supporting tools and methodologies. This special issue illustrates how, to date, engineers have successfully deployed NoCs to meet certain very-aggressive specifications. At the same time, the articles reveal many issues and challenges that require solutions if the NoC paradigm will indeed become a panacea or quasi-panacea for tomorrow’s SoCs.
Keywords :
infrastructure IP; micronetworks; multiprocessor SoCs; networks on chips; on-chip communication; on-chip interconnection network; Clocks; Communication system control; Delay; Intelligent networks; Network-on-a-chip; Protocols; Repeaters; Testing; Timing; Wires; infrastructure IP; micronetworks; multiprocessor SoCs; networks on chips; on-chip communication; on-chip interconnection network;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2005.111
Filename :
1511971
Link To Document :
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