DocumentCode
1174558
Title
Digital all-pass networks
Author
Mitra, S.K. ; Hirano, K.
Volume
21
Issue
5
fYear
1974
fDate
9/1/1974 12:00:00 AM
Firstpage
688
Lastpage
700
Abstract
A systematic method is outlined to realize an
th-order all-pass digital transfer function using only
multipliers as a cascade of first-order and/or second-order all-pass sections. The realization is based on the multiplier extraction approach in which the
th-order filter section is considered as a digital
-pair of which
pairs of input and output terminal variables are constrained by
multipliers. The transfer matrix parameters of the digital
-pair, containing only delays and adders, are first identified from which the realization is obtained by inspection. Both canonic and noncanonic realizations are derived. All realizations are then compared with regard to the effect of multiplication roundoff and hardware requirements.
th-order all-pass digital transfer function using only
multipliers as a cascade of first-order and/or second-order all-pass sections. The realization is based on the multiplier extraction approach in which the
th-order filter section is considered as a digital
-pair of which
pairs of input and output terminal variables are constrained by
multipliers. The transfer matrix parameters of the digital
-pair, containing only delays and adders, are first identified from which the realization is obtained by inspection. Both canonic and noncanonic realizations are derived. All realizations are then compared with regard to the effect of multiplication roundoff and hardware requirements.Keywords
All-pass networks; Digital networks and systems; Recursive digital filters; Added delay; Adders; Digital filters; Equalizers; Filtering; Gold; Hardware; Inspection; Pulse compression methods; Transfer functions;
fLanguage
English
Journal_Title
Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0098-4094
Type
jour
DOI
10.1109/TCS.1974.1083908
Filename
1083908
Link To Document