Title :
SLS-a fast switch-level simulator [for MOS]
Author :
Barzilai, Zeev ; Beece, Daniel K. ; Huisman, Leendert M. ; Iyengar, Vijay S. ; Silberman, Gabriel M.
Author_Institution :
IBM T.J. Watson Res. Center, Yorktown Heights, NY, USA
fDate :
8/1/1988 12:00:00 AM
Abstract :
SLS, a large-capacity, high-performance switch-level simulator developed to run on an IBM System/370 architecture is described. SLS uses a model which closely reflects the behavior of MOS circuits. The high performance is the result of mixing a compiled model with the more traditional approach of event-driven simulation control, together with very efficient algorithms for evaluating the steady-state response of the circuit. SLS is used for design verification/checking applications and for estimating fault coverage
Keywords :
digital simulation; field effect integrated circuits; IBM System/370 architecture; MOS circuits; compiled model; design verification/checking applications; event-driven simulation; fast switch-level simulator; fault coverage; steady-state response; Application software; Circuit faults; Circuit simulation; Computational modeling; Computer simulation; Design automation; Discrete event simulation; Laser sintering; Steady-state; Switching circuits;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
