DocumentCode :
1175449
Title :
On-chip self-calibrating communication techniques robust to electrical parameter variations
Author :
Worm, Frédéric ; Ienne, Paolo ; Thiran, Patrick ; De Micheli, Giovanni
Author_Institution :
Sch. of Comput. & Commun. Sci., Swiss Fed. Inst. of Technol., Lausanne, Switzerland
Volume :
21
Issue :
6
fYear :
2004
Firstpage :
524
Lastpage :
535
Abstract :
Dynamic self-calibration holds the promise of overcoming conservative worst-case design techniques needed to combat deep-submicron process and operating variations. We propose an on chip point-to-point interconnect scheme characterized by self-calibration that can operate dynamically to achieve the best energy/performance trade-off.
Keywords :
CMOS logic circuits; circuit analysis computing; system-on-chip; deep-submicron process; electrical parameter variation; on chip point-to-point interconnect scheme; on-chip self-calibrating communication technique; worst-case design techniques; Delay; Digital control; Digital signal processing; Error correction; Integrated circuit interconnections; Robustness; Runtime; System-on-a-chip; Temperature; Voltage;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2004.96
Filename :
1363707
Link To Document :
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