DocumentCode :
1176485
Title :
Optimal design of nonlinear dc transistor circuits without solving network equations
Author :
Dutta, S. R K ; Vidyasagar, Mathukumalli
Volume :
22
Issue :
8
fYear :
1975
fDate :
8/1/1975 12:00:00 AM
Firstpage :
661
Lastpage :
665
Abstract :
A method is described for the optimization of nonlinear dc circuits. A performance index is defined to measure the difference. between the desired and the actual specifications. The novel approach taken here is to treat the network equations as equality constraints on the design parameters. The constrained optimization problem is then converted to an unconstrained one by a penalty function technique. A straightforward method is given for computing all the gradients needed during the optimization, given only the topology of the network and the branch relationships. This makes the algorithm easily amenable to a package program.
Keywords :
Computer applications, circuit design; Computer-aided circuit analysis and design; Nonlinear networks; Optimization techniques; Algorithm design and analysis; Constraint optimization; Design optimization; Graph theory; Nonlinear circuits; Nonlinear equations; Optimization methods; Performance analysis; Telephony; Voltage;
fLanguage :
English
Journal_Title :
Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0098-4094
Type :
jour
DOI :
10.1109/TCS.1975.1084103
Filename :
1084103
Link To Document :
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