DocumentCode :
1176646
Title :
Microstenciling: a generic technology for microscale patterning of vapor deposited materials
Author :
Graff, Mason ; Mohanty, Swomitra K. ; Moss, Eileen ; Frazier, A. Bruno
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Volume :
13
Issue :
6
fYear :
2004
Firstpage :
956
Lastpage :
962
Abstract :
The fabrication of microstencils for patterning on unconventional substrates was demonstrated. Stencil feature sizes ranging from 6 to 370 μm with aspect ratios (stencil feature height :width) in the range of 0.5 : 1 to 15 : 1 were fabricated using ICP etching of silicon. The stenciling process was demonstrated for the deposition of metals (Ti/Au) and dielectrics (silicon dioxide) onto silicon, glass, and polymer based substrates for microfluidic system development. The results demonstrated some dependency of the deposition rate on the stencil feature size and aspect ratio. Results from adhesion studies showed excellent adhesion on all substrates with the exception of PMMA.
Keywords :
gold alloys; metallisation; microfluidics; micromechanical devices; silicon compounds; sputter etching; titanium alloys; vapour deposited coatings; 6 to 370 micron; ICP etching; SiO2; Ti-Au; deposition rate; generic technology; inductively coupled plasma etching; metallization; microfluidic system development; microscale patterning; microstenciling; silicon dioxide; thin-film deposition; vapor deposited materials; Chemical analysis; Chemical technology; Dielectric substrates; Etching; Fabrication; Glass; Microelectronics; Plastics; Polymers; Silicon on insulator technology; 65; Metallization; microstenciling; microsystems; thin-film deposition;
fLanguage :
English
Journal_Title :
Microelectromechanical Systems, Journal of
Publisher :
ieee
ISSN :
1057-7157
Type :
jour
DOI :
10.1109/JMEMS.2004.838368
Filename :
1364054
Link To Document :
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