Title :
The quarter-state-sequence floorplan representation
Author :
Sakanushi, Keishi ; Kajitani, Yoji ; Mehta, Dinesh P.
Author_Institution :
Dept. of Inf. Syst. Eng., Osaka Univ., Japan
fDate :
3/1/2003 12:00:00 AM
Abstract :
A floorplan of a bounding box is its dissection into rectangles (rooms) by horizontal and vertical segments. This paper proposes a string data structure called the Quarter-state sequence (or Q sequence) to represent the floorplan. The Q sequence is a concatenation of the states of rooms along the Abe order and is related to the VH graph, which is the union of the vertical-constraint and horizontal-constraint graphs. It is proved that any floorplan of n rooms is uniquely encoded by a Q sequence and any Q sequence is uniquely decoded to a floorplan, both in O(n) time. An exact formula for counting distinct floorplans is given and compared with existing bounds. A linear time transformation of one Q sequence to another is defined. An n-room packing algorithm based on simulated annealing was implemented and found to compare favorably with existing packing algorithms.
Keywords :
VLSI; circuit layout CAD; computational complexity; data structures; decoding; encoding; graph theory; integrated circuit layout; sequences; simulated annealing; Abe order; VH graph; adjacency relations; bounding box; computational complexity; graph theory; graph union; horizontal segments; horizontal-constraint graphs; linear time transformation; n-room packing algorithm; packing algorithms; quarter-state-sequence floorplan representation; simulated annealing; string data structure; vertical segments; vertical-constraint graphs; Combinatorial mathematics; Cost function; Data structures; Decoding; Graph theory; Hip; Large scale integration; Simulated annealing; Tree graphs; Very large scale integration;
Journal_Title :
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
DOI :
10.1109/TCSI.2003.809442