Efficient built in self repair techniques for repairing multiport embedded RAMs

Innovation in VLSI technology rapidly increases memory capacity, density which further improves the yield and the need for testing. The redundant rows (columns) in memory array can be used to replace faulty cells anywhere in the memory, using some testing and repairing algorithms. A novel built in self repair redundant mechanism is proposed for multiport memory by combining HESP algorithm for repairing orthogonal faults and faulty rows (columns) and DLA algorithm for repairing inter port faults. The redundancy analysis and testing circuits can be integrated with the repairing circuits. Moreover, redundant memory can be shared among all memory cores within same memory group. Experimental results using simulation shows the reduction in area overhead and improvement in repair rate due to efficient usage of redundancy.