Title :
An efficient heterogeneous tree multiplexer synthesis technique
Author :
Huang, Hsu-Wei ; Wang, Cheng-Yeh ; Jou, Jing-Yang
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
In this paper, a novel strategy for designing the heterogeneous tree multiplexer is proposed. The authors build the multiplexer delay model by curve fitting and then formulate the heterogeneous tree multiplexer design problem as a special type of optimization problem called mixed-integer nonlinear programming (MINLP). A new design parameter, the switch size in each stage, is introduced to improve the speed of the heterogeneous tree multiplexer. The proposed strategy can determine the multiplexer architecture and the switch size in each stage simultaneously. Three optimization methods are provided to synthesize the heterogeneous tree multiplexer according to the design specifications.
Keywords :
circuit optimisation; curve fitting; integer programming; logic circuits; logic design; nonlinear programming; curve fitting; heterogeneous tree multiplexer design; heterogeneous tree multiplexer synthesis; mixed integer nonlinear programming; multiplexer delay model; optimization problem; transistor sizing; Binary trees; Curve fitting; Decoding; Delay; Design optimization; Digital-analog conversion; Minimization methods; Multiplexing; Optimization methods; Switches; Capacitance; modeling; optimization; simulation; transistor sizing;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2005.852032