DocumentCode
117822
Title
High speed multiplier for FIR filter design using window
Author
Shukla, Tushar ; Shukla, P.K. ; Prabhakar, Harish
Author_Institution
Electron. & Commun. Dept., Rajiv Gandhi Tech. Univ., Bhopal, India
fYear
2014
fDate
20-21 Feb. 2014
Firstpage
486
Lastpage
491
Abstract
The high speed multiplication operation plays vital part in Digital Signal Processor (DSPs) as well as in general processor. Finite Impulse Response (FIR) filter with higher speed is of great importance. FIR filter is also called convolution filter since convolution is the fundamental concept of designing FIR filter. Vedic Mathematics is based on 16 sutras. One of the sutra is Urdhava Tiryagbhyam which delivers a difference in the actual process of multiplication itself. In this paper, we proposed a high speed multiplication operation based on Urdhava Tiryagbhyam sutra to design FIR filter using window. This algorithm is implemented in MATLAB and performed in GUI. Further the execution time taken by FIR filter processor is compared by Urdhava of Vedic method and inbuilt MATLAB function. In the results, it can be seen that FIR filter based on Urdhava Tiryagbhyam sutra reduces the execution time as compared to inbuilt function of MATLAB.
Keywords
FIR filters; digital arithmetic; FIR filter design; Urdhava Tiryagbhyam sutra; Vedic mathematics; convolution filter; digital signal processor; finite impulse response filter; high speed multiplication operation; high speed multiplier; Convolution; Digital signal processing; Finite impulse response filters; Graphical user interfaces; MATLAB; Mathematics; DSP; FIR filter using window; Urdhava Tiryagbhyam sutra; Vedic multiplier;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing and Integrated Networks (SPIN), 2014 International Conference on
Conference_Location
Noida
Print_ISBN
978-1-4799-2865-1
Type
conf
DOI
10.1109/SPIN.2014.6777002
Filename
6777002
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