Performance of In0.53Ga0.47As and InP junction field-effect transistors for optoelectronic integrated circuits. I. Device analysis

The authors have developed an analytical model to study In_0.53Ga_0.47As and InP junction field-effect transistors (JFETs) for use in InP-based optoelectronic integrated circuits (OEICs). This model includes the effects of channel resistance and band-to-band tunneling. The agreement between the calculations and experimental results supports the validity of the model. The authors discuss the optimum design for these JFETs and compare their performance quantitatively. In order to prevent device performance from being degraded by the effects of tunneling, the optimum channel dopings of In _0.53Ga_0.47As and InP JFETs are found to be 7×10¹⁶ and 5×10¹⁷ cm^-3, respectively. In_0.53Ga_0.47As JFETs not operated in the tunneling regime show at least a 40% higher efficiency than InP JFETs in terms of the power dissipated per transconductance. The authors conclude that In_0.53Ga_0.47As JFETs are well suited for very-high-density monolithic integration, where power efficiency must be high