A method for accelerating the design of optimal linear-phase FIR digital filters

Author

Bomar, Bruce W. ; Winkleman, Bradley C.

Author_Institution

Tennessee Univ. Space Inst., Tulahoma, TN, USA

Volume

39

Issue

6

fYear

1991

fDate

6/1/1991 12:00:00 AM

Firstpage

1419

Lastpage

1421

Abstract

A simple method is presented for reducing the execution time of the McClellan-Parks-Rabiner (1973) FIR (finite impulse response) digital filter design program on computers with a floating-point processor. It is found that 80% to 90% of the execution time of this program involves only four lines of the program code. By efficiently implementing these four lines of code in assembly language it is possible to significantly reduce the execution time. Examples of this method are given for personal computers based on both 8086-family and 68000-family microprocessors with a corresponding math coprocessor. It is found that for these computers the method reduces execution time by a factor of 1.6 to 1.9

Keywords

assembly language listings; circuit CAD; digital filters; microcomputer applications; 68000 microprocessor; 8086 microprocessor; FIR digital filters; FORTRAN; assembly language; digital filter design program; execution time reduction; floating-point processor; math coprocessor; optimal linear phase filters; personal computers; program code; Acceleration; Algorithms; Assembly; Chebyshev approximation; Coprocessors; Digital filters; Finite impulse response filter; IIR filters; Microprocessors; Process design;

fLanguage

English

Journal_Title

Signal Processing, IEEE Transactions on

Publisher

ieee

ISSN

1053-587X

Type

jour

DOI

10.1109/78.136548

Filename

136548