Title :
Failure diagnosis of structured VLSI
Author :
Waicukauski, John A. ; Lindbloom, Eric
Author_Institution :
Mentor Graphics Corp., Beaverton, OR, USA
Abstract :
The authors describe a method for diagnosing the failures observed in testing VLSI designs that use the scan-path structure. Diagnosis consists of simulating selected faults after testing using a fault simulator that allows the application of several patterns in parallel. The method is also suitable for signature-based random-pattern testing. The authors discuss diagnostic fault simulation, fault-list generation, relating faults to defects, diagnostic strategy, and random-pattern failures, and they report some experimental results to indicate the procedure´s power.<>
Keywords :
VLSI; fault location; integrated circuit testing; logic testing; diagnostic strategy; failure diagnosis; fault simulator; fault-list generation; faults simulation; random-pattern failures; scan-path structure; signature-based random-pattern testing; structured VLSI; testing; Dictionaries; Fault detection; Fault diagnosis; Performance evaluation; Test pattern generators; Testing; Very large scale integration;
Journal_Title :
Design & Test of Computers, IEEE
