DocumentCode :
1179098
Title :
Circuit theoretic analysis and synthesis of marked graphs
Author :
Murata, Tadao
Volume :
24
Issue :
7
fYear :
1977
fDate :
7/1/1977 12:00:00 AM
Firstpage :
400
Lastpage :
405
Abstract :
Marked graphs are a graph model for representing and studying parallel computations and concurrent processes. This paper provides circuit theoretic concepts and methods for the analysis and synthesis of marked graphs. Among the results obtained, the reachability theorem developed in this paper is a generalization of known results in the sense that it does not require two hypotheses: the liveness of an initial marking and the strongly connectedness of marked graphs. A synthesis problem of marked graphs from prescribed markings is proposed, and is shown to be that of realizing cutset matrices as directed graphs.
Keywords :
Graph theory; Circuit analysis; Circuit synthesis; Circuits and systems; Concurrent computing; Equations; Kirchhoff´s Law; Parallel processing; Petri nets; Sufficient conditions; Voltage;
fLanguage :
English
Journal_Title :
Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0098-4094
Type :
jour
DOI :
10.1109/TCS.1977.1084357
Filename :
1084357
Link To Document :
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