Abstract :
A low-leakage current, low-area voltage regulator for system-on-a-chip processors is proposed. The system is demonstrated in a 0.13 μm CMOS technology with a supply voltage varied between 0.8 and 1.5 V. Using this system, the leakage current and power are reduced by as much as 44× and 33×, respectively, compared to conventional topologies.
Keywords :
CMOS digital integrated circuits; circuit optimisation; leakage currents; microprocessor chips; system-on-chip; voltage regulators; 0.13 micron; 0.8 to 1.5 V; CMOS digital integrated circuits; leakage current reduction; low-area voltage regulator; low-leakage current; microprocessor chips; power reduction; system-on-a-chip processors;
