• DocumentCode
    1179553
  • Title

    On decoding techniques for residue number system realizations of digital signal processing hardware

  • Author

    Jullien, G.

  • Volume
    25
  • Issue
    11
  • fYear
    1978
  • fDate
    11/1/1978 12:00:00 AM
  • Firstpage
    935
  • Lastpage
    936
  • Abstract
    In a recent issue of this journal, a hardware implementation of the Chinese Remainder Theorem was proposed for the translation of residue coded outputs into natural integer for an FIR filter realization. The method requires a modulo M adder-shifter network which is not commercially available and has to be constructed from more basic logic elements. This letter presents a more successful technique based on a mixed-radix conversion process. The residue to binary decoder can be built using commercially available elements and requires shorter word lengths in the ROM which stores the output function.
  • Keywords
    FIR (finite-duration impulse-response) digital filters; Residue arithmetic; Adaptive filters; Decoding; Digital signal processing; Finite impulse response filter; Hardware; Logic circuits; Logic design; Read only memory; Shift registers; Table lookup;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-4094
  • Type

    jour

  • DOI
    10.1109/TCS.1978.1084399
  • Filename
    1084399