DocumentCode :
1180065
Title :
SoftSig: Software-Exposed Hardware Signatures for Code Analysis and Optimization
Author :
Tuck, James ; Ahn, Wonsun ; Torrellas, Josep ; Ceze, Luis
Author_Institution :
North Carolina State Univ., Raleigh, NC
Volume :
29
Issue :
1
fYear :
2009
Firstpage :
84
Lastpage :
95
Abstract :
Many code analysis techniques for optimization, debugging, and parallelization must perform runtime disambiguation of address sets. Hardware signatures support such operations efficiently and with low complexity. SoftSig exposes hardware signatures to software through instructions that control which addresses to collect and which to disambiguate against. The Memoise algorithm demonstrates SoftSig´s versatility by detecting and eliminating redundant function calls.
Keywords :
logic testing; optimising compilers; parallel programming; program debugging; program diagnostics; SoftSig; code analysis; code debugging; code optimization; runtime disambiguation; software-exposed hardware signature; Costs; Debugging; Frequency; Hardware; Monitoring; Performance analysis; Proposals; Runtime; Software algorithms; Yarn; memory disambiguation; multicore architectures; runtime optimization;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/MM.2009.15
Filename :
4796172
Link To Document :
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