Design of FPGA-based rapid prototype spectral subtraction for hands-free speech applications

In this paper, the design of a FPGA-based rapid prototype for Short-Time Fourier Transform (STFT) based spectral subtraction for hands-free speech applications using Xilinx System Generator (XSG) tools without traditional HDL hand coding is presented. Initially, the concept of a dual-channel short-time spectral subtraction algorithm for removing the wideband background noise in a speech signal is introduced. The studied algorithm is developed in the system-level modeling simulator using MATLAB Simulink environment. For the digital hardware design, simple hardware architectures for data framing and overlapping algorithms are proposed by utilizing the basic DSP blocksets of the XSG library, and replaced in the simulation model. Finally, a complete simulation model of the FPGA-based short-time spectral subtraction algorithm using XSG is presented. The comparative performance evaluation based on simulation results and the summary of resource utilization are confirmed the implementation feasibility of the real-time FPGA-based short-time spectral subtraction algorithm for hands-free speech applications.