Low cost fabrication of TSV-based silicon interposer using wet chemical etching and its application in 3D packaging

Author

Jiaotuo Ye ; Xiao Chen ; Chunsheng Zhu ; Le Luo ; Gaowei Xu

Author_Institution

SIMIT, Univ. of Chinese Acad. of Sci., Shanghai, China

fYear

2014

fDate

12-15 Aug. 2014

Firstpage

32

Lastpage

35

Abstract

TSV is an enabler for 3D integration of smart system. This paper presented a novel silicon interposer fabrication method based on double-sided anisotropic etching of (100) oriented silicon with the features of low cost and relatively high interconnection density. A trench structure was designed to decrease the diameter of the TSV. The integration process of TSV interconnections was investigated, including wafer thinning, via formation, via metallization. All the test vehicles passed the short/open test, and the electrical resistance of the TSV is about 1.2 Ohm. The interposer was applied to the 3D packaging of GaAs photodetector and readout circuit, and the test result showed an excellent signal output.

Keywords

elemental semiconductors; etching; gallium arsenide; integrated circuit interconnections; integrated circuit manufacture; integrated circuit metallisation; integrated circuit packaging; integrated circuit testing; photodetectors; readout electronics; silicon; three-dimensional integrated circuits; wetting; 3D integration; 3D packaging; GaAs; Si; TSV-based silicon interposer fabrication method; double-sided anisotropic etching; electrical resistance; interconnection density; metallization; photodetector; readout circuit; smart system; trench structure; wafer thinning; wet chemical etching; Erbium; Magnetic resonance imaging; 3D packaging; silicon interposer; wet etching;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Packaging Technology (ICEPT), 2014 15th International Conference on

Conference_Location

Chengdu

Type

conf

DOI

10.1109/ICEPT.2014.6922568

Filename

6922568