Title :
CAD navigation and diagnostics by linking ATE and EDA
Author :
Nagano, Katsuhito
Author_Institution :
Advantest Corp. Gunma R&D Center, Japan
Abstract :
This paper describes a specific methodology and software that links automated test equipment (ATE) and electronic design automation (EDA) tools to identify and diagnose failures at the layout level. The ATE software, named wafer fail layout map (WFLMAP), works in concert with the EDA integrated circuits (IC) design database and provides computer-aided design (CAD) navigation and correlation between the tester failure data and IC design data. With this approach, layout-level defect diagnosis is achieved at the individual chip level, as well as at the wafer level. This method can also be used for improved design for manufacturing (DFM).
Keywords :
automatic test equipment; circuit CAD; circuit layout CAD; design for manufacture; failure analysis; integrated circuit design; integrated circuit testing; ATE; CAD navigation; DFM; EDA; IC design; WFLMAP; automated test equipment; computer-aided design navigation; design for manufacturing; electronic design automation; failure diagnosis; integrated circuit design; layout-level defect diagnosis; wafer fail layout map; Circuit testing; Databases; Design automation; Electronic design automation and methodology; Integrated circuit layout; Integrated circuit testing; Joining processes; Navigation; Software tools; Test equipment; Computer-aided design (CAD) navigation; defect diagnosis; design for manufacturing (DFM); diagnostic; failure map;
Journal_Title :
Instrumentation and Measurement, IEEE Transactions on
DOI :
10.1109/TIM.2005.855079
