Title :
Reconfigurable embedded MAC core design for low-power coarse-grain FPGA
Author :
Hong, Sangjin ; Chin, Shu-Shin
Author_Institution :
Dept. of Electr. & Comput. Eng., State Univ. of New York, Stony Brook, NY, USA
fDate :
4/3/2003 12:00:00 AM
Abstract :
A reconfigurable multiplier design for low-power field programmable gate arrays (FPGAs) is presented. Power consumption reduction is achieved through varying the depth of pipeline of the multiplier. The multiplier incorporates a capability of configuring itself dynamically, thus, is suitable for FPGA type of design.
Keywords :
CMOS logic circuits; carry logic; field programmable gate arrays; logic design; low-power electronics; multiplying circuits; pipeline arithmetic; CMOS process; carry-save array; coarse-grain FPGA; embedded MAC core design; low-power FPGA; low-power field programmable gate arrays; pipeline depth variation; power consumption reduction; reconfigurable multiplier design;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20030364
