High frequency compensated current-mode ladder filters using multiple output OTAs

Author

Ramírez-Angulo, Jaime ; Sánchez-Sinencio, Edgar

Author_Institution

Dept. of Electr. & Comput. Eng., New Mexico State Univ., Las Cruces, NM, USA

Volume

41

Issue

9

fYear

1994

fDate

9/1/1994 12:00:00 AM

Firstpage

581

Lastpage

586

Abstract

A methodology to implement compensated current-mode filters using multiple output OTAs and based on RLC ladder filter prototypes is presented. The resulting structures are very compact and share the low sensitivity characteristics of the passive RLC prototypes. They can be realized as CMOS circuits since they use only grounded capacitors and OTAs with one of the input terminals grounded. Compensation techniques to minimize degradation in the filter response due to excess phase of OTA parasitic poles are discussed. Simulations with CMOS OTAs and experimental results from discrete circuit implementations using bipolar OTAs are presented that verify the proposed approach

Keywords

CMOS integrated circuits; active filters; compensation; ladder networks; linear integrated circuits; operational amplifiers; poles and zeros; sensitivity analysis; CMOS circuits; OTA parasitic poles; RLC ladder filter prototypes; current-mode ladder filters; discrete circuit simulation; filter response; frequency compensation; grounded capacitors; multiple output OTAs; sensitivity characteristics; Adders; Capacitors; Circuit simulation; Current mode circuits; Degradation; Frequency; Passive filters; Prototypes; RLC circuits; Voltage;

fLanguage

English

Journal_Title

Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on

Publisher

ieee

ISSN

1057-7130

Type

jour

DOI

10.1109/82.326584

Filename

326584