DocumentCode :
1185775
Title :
Large moduli multipliers for signal processing
Author :
Taylor, Fredrick J.
Volume :
28
Issue :
7
fYear :
1981
fDate :
7/1/1981 12:00:00 AM
Firstpage :
731
Lastpage :
736
Abstract :
The residue number system has been recently shown to be a viable signal processing media. However, it does possess limitations. One of the most serious is overflow prevention through magnitude scaling. One method of overcoming this defect is to increase the dynamic range of the numbering system. To this end a new high-speed large moduli multiplier has been developed. The multiplier is the result of combining the quartersquared algorithm with recent breakthroughs in device technology. As a result, equivalent 18-bit full precision products can be obtained at a pipelined rate of 28.5 \\times 103 multiplies per second.
Keywords :
DSP; Digital signal processing (DSP); Multiplication; Residue arithmetic; Arithmetic; Digital systems; Dynamic range; Filtering; Nonlinear filters; Random access memory; Read only memory; Read-write memory; Signal processing; Signal processing algorithms;
fLanguage :
English
Journal_Title :
Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0098-4094
Type :
jour
DOI :
10.1109/TCS.1981.1085027
Filename :
1085027
Link To Document :
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