A simplified synthesis of lossless cascade analog and digital two-port networks

A synthesis algorithm for the cascade (chain) decomposition of lossless, real two-port networks is presented, which eliminates the need for performing basic polynomial operations such as factorization, division, root extraction, and continued fraction expansion. The algorithm is based on characterizing each elementary section of order one or two minimally using the location of the transmission zero, the value of the reflectance at the transmission zero, and the value of the return group delay at the transmission zero, which is only required for reciprocal sections. Necessary and sufficient conditions are given for these values that ensure realizability with real networks. During the extraction of a section that realizes a particular transmission zero, the triplets that characterize the remaining transmission zeros are recomputed using a pair of simple algebraic expressions that only require complex multiplications and divisions. If the extracted section is chosen appropriately, the recompute triplets characterize a lower order network and the resulting realization is canonic