Thermal analysis of 2.5-D package designs with joule heating effect along TSVs

In this work, several design approaches are considered in the thermal analysis and enhancements of a 2.5-D package with multi chips on through silicon interposer (TSI), which include overmolding materials, metal slug, lid attachment, pin fin heat sink and fan-driven heat sink cooling. The analysis models consist of two dummy flip chips on a silicon interposer to represents the logic die and memory die respectively. It is found that the thermal conductivity of the overmolding has minimal effect on the thermal performance of copper slug package. Lid attachment further enhances the thermal performance through peripheral substrate attachment. Both designs rely on 4L PCB to maximize power dissipation. Pin-fin heat sink, made of aluminum can be mounted on the package top to further minimize thermal resistance and push the power dissipation beyond 10W. The analysis is also verified with thermal measurement. For high power application, fan cooled heat sink is used to reduce excessive heat. Copper based aluminum heat sink can remove the heat of 120W from the bare-die package. Joule heating due to microscale sizes of TSV and micro lines is discussed. The proposed analytical expression gives good prediction on the local TSV hot spot. It is demonstrated that a distributed TSV network design provides lower temperature rise, which shall have lower risk of failures and is preferred in practice.