DocumentCode :
1186186
Title :
Write/erase cycling endurance of memory cells with SiO2/HfO2 tunnel dielectric
Author :
Blomme, Pieter ; Van Houdt, Jan ; De Meyer, Kristin
Volume :
4
Issue :
3
fYear :
2004
Firstpage :
345
Lastpage :
352
Abstract :
The write/erase cycling endurance of low voltage floating-gate memory cells programmed and erased by tunneling through a SiO2/HfO2 dual layer tunnel dielectric stack is investigated. The use of fixed single pulse program and erase conditions leads to fast shifting (after ∼1000 cycles) of the threshold voltage window, so that only a limited number of write/erase cycles can be achieved. Increasing the write and erase duration quickly leads to an excessive erase time so that a different erase method has to be used. Improvement of the erase behavior and cycling endurance has been obtained by a combination of two methods. Inclusion of soft write pulses between the erase pulses reduces the amount of charge trapped in the tunnel dielectric and therefore limits the increase in erase time. Also, the erase voltage can progressively be raised in order to further limit the erase time, leading to an endurance of 10 000 cycles on the considered cells. When combining the SiO2/HfO2 stack with channel hot electron injection so that tunneling is only required in one direction, 100 000 write/erase cycles are demonstrated with minimal change of the memory window.
Keywords :
hafnium compounds; integrated memory circuits; low-power electronics; silicon compounds; tunnelling; HIMOS; SiO2-HfO2; SiO2-HfO2 tunnel dielectric; channel hot electron injection; charge trapping; dual layer tunnel dielectric stack; erase conditions; erase pulses; erase voltage; flash nonvolatile memory; high-k tunnel dielectric; low voltage floating-gate memory cells; memory window; single pulse program; soft write pulses; threshold voltage window; write-erase cycling endurance; Channel hot electron injection; Flash memory; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; Lead compounds; Low voltage; Nonvolatile memory; Threshold voltage; Tunneling;
fLanguage :
English
Journal_Title :
Device and Materials Reliability, IEEE Transactions on
Publisher :
ieee
ISSN :
1530-4388
Type :
jour
DOI :
10.1109/TDMR.2004.837120
Filename :
1369195
Link To Document :
بازگشت