DocumentCode
118688
Title
Modeling and simulation of silicon wafer backside grinding process
Author
Zhaoqiang Li ; Xiangmeng Jing ; Feng Jiang ; Wenqi Zhang
Author_Institution
Nat. Center for Adv. Packaging, Wuxi, China
fYear
2014
fDate
12-15 Aug. 2014
Firstpage
874
Lastpage
877
Abstract
TSV (through silicon via) is regarded as a key technology for 2.5D and 3D electronic packaging. And the manufacturing of the through silicon interposer is very challenge and costly. In the backside process of interposer, grinding is considered as the most promising technology to control wafer´s surface roughness and surface defect. In this paper, according to the grinding process, a mathematical model is established. According to the model, MATLAB is used to simulate and predict the grinding marks and the distance between two adjacent grinding lines during the backside grinding process. The grinding marks of the half contact grinding model and full contact grinding model with different wheel rotation speed and wafer rotation speed are presented. And the relationship between two adjacent grinding lines and the ratio of wafer rotation speed and wheel rotation speed is predicted. The experiments are also carried out to verify the proposed model. The results of the experiments agree well with the simulation results.
Keywords
electronic engineering computing; elemental semiconductors; grinding; integrated circuit modelling; integrated circuit packaging; mathematical analysis; mathematics computing; silicon; three-dimensional integrated circuits; 2.5D electronic packaging; 3D electronic packaging; MATLAB simulation; Si; TSV technology; adjacent grinding line; half contact grinding model; mathematical model; silicon interposer; silicon wafer backside grinding process; surface defect; surface roughness; through silicon via technology; wafer rotation speed; wheel rotation speed; Abrasives; Mathematical model; Semiconductor device modeling; Silicon; Simulation; Surface treatment; Wheels; backside grinding; grinding; grinding marks; silicon wafer; surface control;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Packaging Technology (ICEPT), 2014 15th International Conference on
Conference_Location
Chengdu
Type
conf
DOI
10.1109/ICEPT.2014.6922787
Filename
6922787
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