DocumentCode :
1187759
Title :
Generation of hardware modules for run-time reconfigurable hybrid CPU/FPGA systems
Author :
Silva, M.L. ; Ferreira, J.C.
Author_Institution :
Univ. do Porto, Porto
Volume :
1
Issue :
5
fYear :
2007
Firstpage :
461
Lastpage :
471
Abstract :
A tool called BitLinker, that creates partially reconfigurable modules from the bit- streams of individual components is described. It is also capable of performing restricted component placement and interconnect routing between the assembled components. The resulting modules are used in applications that exploit partial dynamic reconfiguration. The tool is integrated in a design flow particularly aimed at dynamically reconfigurable platform field-programmable gate arrays (FPGAs). The associated development design flow and a run-time support system that can be used to manage module activation and data communication are described. Evaluation results obtained with a Virtex-II Pro system are also reported.
Keywords :
field programmable gate arrays; logic CAD; program compilers; BitLinker tool; Virtex-II Pro system; component placement; dynamically reconfigurable platform FPGA; field programmable gate array; hardware module; interconnect routing; run-time reconfigurable hybrid CPU-FPGA system;
fLanguage :
English
Journal_Title :
Computers & Digital Techniques, IET
Publisher :
iet
ISSN :
1751-8601
Type :
jour
DOI :
10.1049/iet-cdt:20060056
Filename :
4312771
Link To Document :
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