DocumentCode :
1188230
Title :
Multistage shuffle networks with shortest path and deflection routing for high performance ATM switching: the open-loop shuffleout
Author :
Bassi, Sandro ; Dècina, Maurizio ; Giacomazzi, Paolo ; Pattavina, Achille
Author_Institution :
Dept. of Electron. & Inf., Politecnico di Milano, Italy
Volume :
42
Issue :
10
fYear :
1994
fDate :
10/1/1994 12:00:00 AM
Firstpage :
2881
Lastpage :
2889
Abstract :
A new class of switching architectures for broadband packet networks, called shuffleout, is described and analyzed in the paper. Shuffleout is basically an output-queued architecture with a multistage interconnection network built out of unbuffered b×2b switching elements. Its structure is such that the number of cells that can be concurrently switched from the inlets to each output queue equals the number of stages in the interconnection network. The switching element operates the cell self-routing adopting a shortest path algorithm which, in case of conflict for interstage links, is coupled with deflection routing. The paper presents the basic shuffleout architecture, called open-loop shuffleout, in which the cells that cross the whole interconnection network without entering the addressed output queues are lost. The key target of the proposed architecture is coupling the implementation feasibility of a self-routing switch with the desirable traffic performance typical of output queueing
Keywords :
asynchronous transfer mode; broadband networks; electronic switching systems; hypercube networks; minimisation of switching nets; packet switching; queueing theory; telecommunication network routing; addressed output queues; broadband packet networks; cell self-routing; deflection routing; high performance ATM switching; implementation feasibility; interstage links; multistage interconnection network; multistage shuffle networks; open-loop shuffleout; output queue; output-queued architecture; self-routing switch; shortest path; shortest path algorithm; shuffleout; switching architectures; switching element; traffic performance; unbuffered b×2b switching elements; Asynchronous transfer mode; Communication switching; Fabrics; Multiprocessor interconnection networks; Packet switching; Proposals; Routing; Switches; Telecommunication switching; Throughput;
fLanguage :
English
Journal_Title :
Communications, IEEE Transactions on
Publisher :
ieee
ISSN :
0090-6778
Type :
jour
DOI :
10.1109/26.328957
Filename :
328957
Link To Document :
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