• DocumentCode
    1188699
  • Title

    Design of parasitic-insensitive bilinear-transformed admittance-scaled (BITAS) SC ladder filters

  • Author

    Hökenek, E. ; Moschytz, George S.

  • Volume
    30
  • Issue
    12
  • fYear
    1983
  • fDate
    12/1/1983 12:00:00 AM
  • Firstpage
    873
  • Lastpage
    888
  • Abstract
    A new method for the design of parasitic-insensitive switched-capacitor (SC) ladder filters is described. The filters are derived from analog LC prototypes utilizing the bilinear z -transform. The method is based on the signal-flowgraph (SFG) concept in the discrete-time domain. The resulting networks preserve the frequency response and low sensitivity properties of the equivalent continuous-time LC filters.
  • Keywords
    Bilinear transformations; Circuit sensitivity optimization; Ladder filters; Signal flow graphs; Switched-capacitor filters; Z transforms; Active filters; Capacitors; Design methodology; Frequency response; Passive filters; Prototypes; RLC circuits; Signal design; Transfer functions; Voltage;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-4094
  • Type

    jour

  • DOI
    10.1109/TCS.1983.1085320
  • Filename
    1085320
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1188699