• DocumentCode
    1188953
  • Title

    Memory requirements for the hardware implementation of decimators

  • Author

    Bertrand, John

  • Volume
    30
  • Issue
    4
  • fYear
    1983
  • fDate
    4/1/1983 12:00:00 AM
  • Firstpage
    247
  • Lastpage
    248
  • Abstract
    The tradeoffs between Memory requirements and Arithmetic Unit speed in the hardware implementation of decimators by FIR digital filters are discussed.
  • Keywords
    FIR (finite-duration impulse-response) digital filters; Signal sampling/reconstruction; Adders; Delay effects; Delay lines; Digital arithmetic; Digital filters; Finite impulse response filter; Frequency; Hardware; Sampling methods; Size control;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-4094
  • Type

    jour

  • DOI
    10.1109/TCS.1983.1085346
  • Filename
    1085346
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1188953