DocumentCode :
1189459
Title :
The Application of Shift Registers to Secondary State Assignment: Part I
Author :
Johnson, David L. ; O´Keefe, Kenneth Herbert
Author_Institution :
IEEE
Issue :
10
fYear :
1968
Firstpage :
954
Lastpage :
965
Abstract :
Abstract—An algorithm, which determines whether or not an arbitrary sequential machine can be realized using a set of equal-length shift registers, is developed. When realization is possible, a basis for state assignment is also given.
Keywords :
Index Terms—Equal-length registers, multiclock operation, sequential machine, shift-register memory, state assignment, transition constraints.; Binary codes; Circuit synthesis; Clocks; Combinational circuits; Delay; Equations; Helium; Logic design; Logic devices; Shift registers; Index Terms—Equal-length registers, multiclock operation, sequential machine, shift-register memory, state assignment, transition constraints.;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1968.226441
Filename :
1687241
Link To Document :
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