DocumentCode
1189564
Title
R68-45 Electrically Alterable Digital Differential Analyzer
Author
Farrand, W.A.
Author_Institution
Autonetics
Issue
10
fYear
1968
Firstpage
1004
Lastpage
1004
Abstract
This paper describes an all-parallel DDA with electronic patchboard, high iteration rate (one million complete computation cycles per second), and reasonable word length (20 bits), built by Teledyne. It further describes the hybrid LSI packaging used (MEMA hybrid multichip flatpack), computer-aided methods of programming, and automatic methods of documenting the resultant coding.
Keywords
Assembly; Automatic programming; Cost function; Education; Electronics packaging; Large scale integration; Program processors; Servomechanisms; Springs; Switches;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1968.226454
Filename
1687252
Link To Document