High- speed PLL and frequency synthesizer for low frequencies

Conventional phase-locked loops (PLL´s) lack speed, because ordinary phase comparators cannot achieve time-continuous phase detection, introducing equivalent time delays into the loops. This paper presents a PLL reconstructed to derive time-optimal responses. First, VCO´s and filters are replaced by time-discrete ones, eliminating the stability problem caused by the time delay. Second, period rather than frequency is employed as the controlled variable for utilizing digital phase comparators as linear time comparators. A prototype consisting of about 20 IC´s is tested.