R68-32 The IADIC: A Hybrid Computing Element

This paper describes an Integrating Analog-to-Digital Converter whose principle of operation is as follows. The output of an analog integrator is monitored by two comparators for positive and negative overflows with respect to a given level q. The comparators drive a bidirectional counter. After every overflow, a pulse of current is added to the integrator input; the polarity, magnitude, and duration of this pulse are calculated to offset the output of the integrator by the amount q.