DocumentCode
1191739
Title
On the Implementation of Failure-Tolerant Counters
Author
Beister, Jochen
Issue
9
fYear
1968
Firstpage
885
Lastpage
886
Abstract
Abstract—A new method of designing and implementing intrinsically failure-tolerant counters with error-correcting state assignments is proposed. Threshold logic elements are used, and state recovery circuitry is united with the flip-flop input logic. A decimal counter built according to this method requires considerably fewer components and has a lower probability of failure at less cost than a diode logic version.
Keywords
Index Terms—Counter, failure-tolerant design, error-correcting reliability, state assignment, threshold logic.; Circuit synthesis; Cost function; Counting circuits; Design methodology; Diodes; Equations; Flip-flops; Logic circuits; Logic design; Logic devices; Index Terms—Counter, failure-tolerant design, error-correcting reliability, state assignment, threshold logic.;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1968.229147
Filename
1687476
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