Error pattern addition for cell synchronisation in ATM systems

The use of cyclic codes for cell header codification in ATM transmission systems constrains the performance of cell synchronisation. Positions near the beginning of each cell are critical because the probability of false header detection is maximised when using a bit-by-bit search routine. To solve this problem, modifications to the standard operations of encoding and decoding by means of a codeword error pattern addition are proposed. The new implementations exhibit the same degree of complexity of the original ones. Improvements in the synchronisation performances are illustrated by simulation.