• DocumentCode
    1194281
  • Title

    On the Attenuation of DAC Aliases Through Multiphase Clocking

  • Author

    Van Zeijl, Paul T M ; Collados, Manel

  • Author_Institution
    Philips Res., Eindhoven
  • Volume
    56
  • Issue
    3
  • fYear
    2009
  • fDate
    3/1/2009 12:00:00 AM
  • Firstpage
    190
  • Lastpage
    194
  • Abstract
    ldquoL-foldrdquo interpolation can be used to lower aliases of digital-to-analog converters (DACs). L-fold interpolation uses multiple DACs, each clocked with different phases of a single clock frequency with each DAC using the same signal data. The literature on this topic indicates that lowering the aliases can only be done by increasing the number of DACs and clock phases. This brief shows that by proper selection of clock phases, precise cancelling of certain aliases for a two-phase clock with two DACs is already possible. The cancellation of aliases helps reduce unwanted spurious emissions when DACs are used as amplitude modulators in polar transmitters.
  • Keywords
    amplitude modulation; digital-analogue conversion; interpolation; modulators; timing circuits; DAC aliases; L-fold interpolation; amplitude modulators; digital-to-analog converters; multiphase clocking; polar transmitters; two-phase clock; Attenuation; Clocks; Digital-analog conversion; Energy consumption; Frequency; Interpolation; Phase modulation; Radio transmitters; Voltage-controlled oscillators; Wireless LAN; Alias cancellation; digital-to-analog conversion (DAC); multiphase clocking; polar transmitters;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Express Briefs, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-7747
  • Type

    jour

  • DOI
    10.1109/TCSII.2009.2015365
  • Filename
    4801646