Title :
An Executable Semantics of SystemC Transaction Level Models and Its Applications with VERDS
Author :
Naiju Zeng ; Wenhui Zhang
Author_Institution :
State Key Lab. of Comput. Sci., Inst. of Software, Beijing, China
Abstract :
Transaction level modeling (TLM) is a high-level approach to modeling digital systems where details of communication are separated from the details of computation. In SystemC transaction level models, modules communicate through function calls provided by channels, which include primitive channels and hierarchical channels. This work extends the semantics of simple SystemC models in previous work to support the key concepts of SystemC transaction level models and presents a tool to transform SystemC source codes in TLM-1.0 to transition systems for the purpose of verification on symbolic model checker VERDS. Our approach is demonstrated through a case study of an abstract bus implemented in TLM-1.0 of SystemC.
Keywords :
C language; formal verification; transaction processing; SystemC transaction level models; TLM; VERDS symbolic model checker; VERDS verification; Abstracts; Computational modeling; Semantics; Software; Time-domain analysis; Time-varying systems; Unified modeling language; SystemC; VERDS; formal semantics; transaction level model;
Conference_Titel :
Engineering of Complex Computer Systems (ICECCS), 2014 19th International Conference on
Conference_Location :
Tianjin
Print_ISBN :
978-1-4799-5481-0
DOI :
10.1109/ICECCS.2014.36