• DocumentCode
    1194306
  • Title

    A second-generation digital signal processor

  • Author

    Essig, Daniel ; Erskine, Cole ; Caudel, Edward ; Magar, Surendar

  • Volume
    33
  • Issue
    2
  • fYear
    1986
  • fDate
    2/1/1986 12:00:00 AM
  • Firstpage
    196
  • Lastpage
    201
  • Abstract
    The architecture, implementation, and applications of the TMS32020, a second-generation VLSI digital signal processor, are described. It has many special features which provide a significant advance over previous VLSI digital signal processors. Its multiprocessor capabilities further distinguish it, allowing for much more flexibility in overall system design. The architecture of the device allows a dual bus structure to be maintained on-chip, while external bus hardware requirements are minimized via the multiplixing of these buses externally. Some of the notable features incorporated onto the device include two large on-chip RAM blocks, large external program/data address spaces, single-cycle multiply/ accumulate instructions, hardware and instructions for efficient memory management, and a versatile multiprocessor interface.
  • Keywords
    MOS integrated circuits; Signal processing; VLSI; VLSI digital filters; Very large-scale integration (VLSI); Architecture; Digital circuits; Digital signal processors; Hardware; Helium; Instruments; Memory management; Random access memory; Read-write memory; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-4094
  • Type

    jour

  • DOI
    10.1109/TCS.1986.1085894
  • Filename
    1085894