Impact of distributed gate resistance on the performance of MOS devices

Author

Razavi, Behzad ; Yan, Ran-Hong ; Lee, Kwing F.

Author_Institution

AT&T Bell Labs., Holmdel, NJ, USA

Volume

41

Issue

11

fYear

1994

fDate

11/1/1994 12:00:00 AM

Firstpage

750

Lastpage

754

Abstract

This paper describes the impact of gate resistance on cut-off frequency (f_T), maximum frequency of oscillation (f_max), thermal noise, and time response of wide MOS devices with deep submicron channel lengths. The value of f_T is proven to be independent of gate resistance even for distributed structures. An exact relation for f_max is derived and it is shown that, to predict f_max, thermal noise, and time response, the distributed gate resistance can be divided by a factor of 3 and lumped into a single resistor in series with the gate terminal

Keywords

MOSFET; electric resistance; equivalent circuits; oscillations; semiconductor device models; semiconductor device noise; thermal noise; transient response; MOS devices; MOSFET; cutoff frequency; deep submicron channel lengths; distributed gate resistance; maximum oscillation frequency; small-signal model; thermal noise; time response; Automatic control; Circuit stability; Cutoff frequency; Linear matrix inequalities; MOS devices; Network address translation; Network synthesis; Sufficient conditions; Thermal resistance; Time factors;

fLanguage

English

Journal_Title

Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

Publisher

ieee

ISSN

1057-7122

Type

jour

DOI

10.1109/81.331530

Filename

331530