• DocumentCode
    1197047
  • Title

    Design of a flexible power-saving logic circuit for CMOS microprocessors employing power-down/save feature

  • Author

    Poornaiah, D.V. ; Ahmad, M.O.

  • Volume
    34
  • Issue
    5
  • fYear
    1987
  • fDate
    5/1/1987 12:00:00 AM
  • Firstpage
    575
  • Lastpage
    576
  • Abstract
    A logic circuit to achieve significant power savings during the inactive periods of CMOS microprocessors ({\\mu}p\´s) is presented. The circuit employs the built-in power-down/power-save feature of the {\\mu}p .
  • Keywords
    CMOS integrated circuits; Microprocessors; CMOS logic circuits; Clocks; Data acquisition; Hardware; Logic circuits; MOS devices; Microprocessors; Oscillators; Signal processing; Sleep;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-4094
  • Type

    jour

  • DOI
    10.1109/TCS.1987.1086171
  • Filename
    1086171
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1197047